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? 2012 fairchild semiconductor corporation www.fairchildsemi.com FAN7390A ? high-current, hi gh & low side, gate-drive ic FAN7390A rev. 1.0.0 october 2012 FAN7390A high-current, high & low-side, gate-drive ic features ? floating channels for bootstrap operation to +600 v ? typically 4.5 a / 4.5 a sourcing / sinking current driv - ing capability ? common-mode dv/dt noise-canceling circuit ? built-in under-voltage lockout for both channels ? matched propagation delay for both channels ? logic (v ss ) and power (com) ground 5v offset ? 3.3 v and 5 v input logic compatible ? output in-phase with input applications ? plasma display panel (pdp) sustain driver ? high intensity discharge (hid) lamp ballast ? smps ? motor driver description the FAN7390A is a monolithic high- and low-side gate- drive ic, which can drive high-speed mosfets and igbts that operate up to +600 v. it has a buffered output stage with all nmos transistors designed for high pulse current driving capability and minimum cross-conduction. fairchild?s high-voltage process and common-mode noise canceling techniques provide stable operation of the high-side driver under high-dv/dt noise circum - stances. an advanced level-shift circuit offers high-side gate driv er operation up to v s =-9.8 v (typical) for v bs =15 v. the uvlo circuit prevents malfunction when v dd and v bs are lower than the specified threshold voltage. the high-current and low-out put volt age-drop feature make this device suitable for the pdp sustain pulse driver, motor driver, switching power supply, and high- power dc-dc converter applications. ordering information 14-sop part number package operating temperature range packing method FAN7390Amx1 14-sop -40 ?c ~ 125 ? c tape & reel
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FAN7390A rev. 1.0.0 2 FAN7390A ? high-current, hi gh & low side, gate-drive ic typical application circuit figure 1. application circuit fo r half-bridge (referenced 14-sop) internal block diagram figure 2. functional block diagram (referenced 14-sop) controller up to 600v d boot q1 r boot c boot 15v q2 r4 r3 r2 r1 output FAN7390A load v ss hin 4nc 3 2 1 11 12 13 14 lin com 7 lo 6 5 v dd 8 9 10 v s v b ho nc nc nc nc hin lin c1 FAN7390A rev.04 v ss uvlo driver pulse generator hin v b ho v s r r s q 11 12 13 1 noise canceller lo 5 6 7 lin 2 v ss v dd com pin 4, 8, 9, 10 and 14 are no connection FAN7390A rev.01 FAN7390A 3 200k 200k driver delay uvlo v ss /com level shift
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FAN7390A rev. 1.0.0 3 FAN7390A ? high-current, hi gh & low side, gate-drive ic pin configurations figure 3. pin assignments (top view) pin definitions 14-pin name description 1 hin logic input for high-side gate driver output 2 lin logic input for low-side gate driver output 3 v ss logic ground 5 com low-side driver return 6 lo low-side driver output 7 v dd low-side and logic part supply voltage 11 v s high-voltage floating supply return 12 ho high-side driver output 13 v b high-side floating supply 4, 8, 9, 10, 14 nc no connect v s v b ho FAN7390A rev.02 FAN7390A v ss hin 4 nc 3 2 1 11 12 13 14 lin com 7 lo 6 5 v dd 8 9 10 nc nc nc nc
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FAN7390A rev. 1.0.0 4 FAN7390A ? high-current, hi gh & low side, gate-drive ic absolute maximum ratings stresses exceeding the absolute maximum ratings may damage the device. the device may not function or be opera- ble above the recommended operating conditions and stressing the parts to these levels is not recommended. in addi- tion, extended exposure to stresses above the recommended operating conditions may affe ct device reliability. the absolute maximum ratings are stress ratings only. t a =25c, unless otherwise specified. notes: 1. mounted on 76.2 x 114.3 x 1.6 mm pcb (fr-4 glass epoxy material). 2. refer to the following standards: jesd51-2: integral circuits thermal test me thod environmental conditions - natural convection; and jesd51-3: low effective thermal conducti vity test board for leaded surface mount packages. 3. do not exceed p d maximum under any circumstances. recommended operat ing conditions the recommended operating conditions table defines the conditions for actual dev ice operation. recommended operating conditions are specified to ensure optimal performa nce to the datasheet specifications. fairchild does not recommend exceeding them or designing to absolute maximum ratings. symbol characteristics min. max. unit v s high-side floating supply offset voltage v b -v shunt v b +0.3 v v b high-side floating supply voltage -0.3 625.0 v v ho high-side floating output voltage, ho pin v s -0.3 v b +0.3 v v dd low-side and logic fixed supply voltage -0.3 v shunt v v lo low-side output voltage, lo pin -0.3 v dd +0.3 v v in logic input voltage (hin and lin) v ss -0.3 v dd +0.3 v v ss logic ground v dd -25 v dd +0.3 v dv s /dt allowable offset voltage slew rate 50 v/ns p d (1)(2)(3) power dissipation 1.0 w ? ja thermal resistance, junction-to-ambient 110 ?c/w t j junction temperature +150 ?c t stg storage temperature +150 ?c symbol parameter min. max. unit v b high-side floating supply voltage v s +10 v s +20 v v s high-side floating supply offset voltage 6-v dd 600 v v ho high-side output voltage v s v b v v dd low-side and logic supply voltage 10 20 v v lo low-side output voltage com v dd v v in logic input voltage (hin and lin) v ss v dd v t a operating ambient temperature -40 +125 ?c
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FAN7390A rev. 1.0.0 5 FAN7390A ? high-current, hi gh & low side, gate-drive ic electrical characteristics v bias (v dd , v bs )=15.0 v, v s =v ss =com, t a =25 ? c, unless otherwise specified. the v il , v ih , and i in parameters are referenced to v ss /com and are applicable to the respecti ve input signals hin and lin. the v o and i o parameters are referenced to com and v s is applicable to the respective output signals ho and lo. note: 4. this parameter guaranteed by design. dynamic electrical characteristics v bias (v dd , v bs )=15.0 v, v s =v ss =com=0 v, c l =1000 pf and t a =25 ? c unless otherwise specified. symbol characteristics condition min. typ. max. unit power supply section (v dd and v bs ) v dduv+ v bsuv+ v dd and v bs supply under-voltage ? positive-going threshold 8.0 8.8 9.8 v v dduv- v bsuv- v dd and v bs supply under-voltage ? negative-going threshold 7.4 8.3 9.0 v dduvh v bsuvh v dd and v bs supply under-voltage ? lockout hysteresis voltage 0.5 i lk offset supply leakage current v b =v s =600 v 50 a i qbs quiescent v bs supply current v in =0 v or 5 v 45 80 i qdd quiescent v dd supply current v in =0 v or 5 v 75 110 i pbs operating v bs supply current f in =20 khz, rms value 530 640 a i pdd operating v dd supply current f in =20 khz, rms value 530 640 shunt regulator section v shunt v dd and v bs shunt regulator clamping voltage v dd =sweep or v bs =sweep, i shunt =5 ma 21 23 25 v logic input section (hin, lin) v ih logic "1" input voltage 2.5 v v il logic "0" input voltage 1.2 i in+ logic "1" input bias current v in =5 v 25 50 a i in- logic "0" input bias current v in =0 v 1.0 2.0 r in input pull-down resistance 100 200 k ? gate driver output section (ho, lo) v oh high-level output voltage, v bias -v o no load 1.0 v v ol low-level output voltage, v o no load 35 mv i o+ output high, short-circuit pulsed current (4) v o =0 v, v in =5 v,pw<10 s 3.5 4.5 a i o- output low, short-crcuit pulsed current (4) v o =15 v, v in =0 v,pw<10 s 3.5 4.5 v s allowable negative v s pin voltage for hin signal propagation to ho -9.8 -7.0 v v ss - com v ss -com/com-v ss voltage endurability -5 5 v symbol characteristics test condition min. typ. max. unit t on turn-on propagation delay v s =0 v 140 200 ns t off turn-off propagation delay v s =0 v 140 200 mt delay matching, hs & ls turn-on/off 15 50 t r turn-on rise time 25 50 t f turn-off fall time 20 45
FAN7390A ? high-current, hi gh & low side, gate-drive ic ? 2012 fairchild semiconductor corporation www.fairchildsemi.com FAN7390A rev. 1.0.0 6 typical characteristics figure 4. turn-on propagation delay vs. temperature figure 5. turn-off propagation delay vs . temperature figure 6. turn-on rise time vs. t emperature figure 7. turn-off fall time vs. t emperature figure 8. turn-on delay matching vs. temperature figure 9. turn-off delay matching vs. temperature -40-20 0 20406080100120 60 80 100 120 140 160 180 200 220 240 t on [ns] temperature [c] -40 -20 0 20 40 60 80 100 120 60 80 100 120 140 160 180 200 220 240 t off [ns] temperature [c] -40-20 0 20406080100120 0 10 20 30 40 t r [ns] temperature [c] -40-20 0 20406080100120 0 10 20 30 40 t f [ns] temperature [c] -40-20 0 20406080100120 0 10 20 30 40 50 mt on [ns] temperature [c] -40-20 0 20406080100120 -10 0 10 20 30 40 50 mt off [ns] temperature [c]
FAN7390A ? high-current, hi gh & low side, gate-drive ic ? 2012 fairchild semiconductor corporation www.fairchildsemi.com FAN7390A rev. 1.0.0 7 typical characteristics (continued) figure 10. quiescent v dd supply current vs. temperature figure 11. quiescent v bs supply current vs. temperature figure 12. operating v dd supply current vs. temperature figure 13. operating v bs supply current vs. temperature figure 14. v dd uvlo+ vs. temperature figure 15. v dd uvlo- vs. temperature -40-20 0 20406080100120 0 20 40 60 80 100 120 140 i qdd [ ? a ] temperature [c] -40-20 0 20406080100120 0 20 40 60 80 100 120 i qbs [ ? a ] temperature [c] -40-20 0 20406080100120 200 400 600 800 1000 i pdd [ ? a ] temperature [c] -40 -20 0 20 40 60 80 100 120 200 400 600 800 1000 i pbs [ ? a ] temperature [c] -40-20 0 20406080100120 7.5 8.0 8.5 9.0 9.5 v dduv+ [v] temperature [c] -40-20 0 20406080100120 7.0 7.5 8.0 8.5 9.0 v dduv- [v] temperature [c]
FAN7390A ? high-current, hi gh & low side, gate-drive ic ? 2012 fairchild semiconductor corporation www.fairchildsemi.com FAN7390A rev. 1.0.0 8 typical characteristics (continued) figure 16. v bs uvlo+ vs. temperature figure 17. v bs uvlo- vs. temperature figure 18. high-level output voltage vs . temperature figure 19. low-level output voltage v s. temperature figure 20. logic high input voltage vs . temperature figure 21. logic low input voltage v s. temperature -40-20 0 20406080100120 7.5 8.0 8.5 9.0 9.5 v bsuv+ [v] temperature [c] -40-20 0 20406080100120 7.0 7.5 8.0 8.5 9.0 v bsuv- [v] temperature [c] -40 -20 0 20 40 60 80 100 120 0 300 600 900 1200 1500 v oh [mv] temperature [c] -40-20 0 20406080100120 -20 -10 0 10 20 v ol [mv] temperature [c] -40-20 0 20406080100120 0.5 1.0 1.5 2.0 2.5 3.0 v ih [v] temperature [c] -40-20 0 20406080100120 0.5 1.0 1.5 2.0 2.5 3.0 v il [v] temperature [c]
FAN7390A ? high-current, hi gh & low side, gate-drive ic ? 2012 fairchild semiconductor corporation www.fairchildsemi.com FAN7390A rev. 1.0.0 9 typical characteristics (continued) figure 22. logic input high bias current v s. temperature figure 23. allowable negative v s voltage vs. temperature . -40-20 0 20406080100120 -10 0 10 20 30 40 50 60 i in+ [ ? a ] temperature [c] -40 -20 0 20 40 60 80 100 120 -12 -11 -10 -9 -8 -7 v s [v] temperature [c]
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FAN7390A rev. 1.0.0 10 FAN7390A ? high-current, hi gh & low side, gate-drive ic switching time definitions figure 24. switching time te st circuit (referenced 8-sop) figure 25. input / output timing diagram figure 26. switching time waveform definitions figure 27. delay matchi ng waveform definitions 1nf v b hin com ho v s lo 1 5 lin v dd 7 12 13 6 2 100nf 15v 10f FAN7390A rev.01 hin lin 11 100nf 10f 15v vss 3 1nf hin lin ho lo fan7390 rev.01 50% 90% 50% t on 10% t r t off t f 10% 90% fan7390 rev.01 hin lin ho lo hin lin lo 50% 50% 10% 90% ho mt ho lo mt fan7390 rev.01 90% 10%
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FAN7390A rev. 1.0.0 11 FAN7390A ? high-current, hi gh & low side, gate-drive ic package dimensions figure 28. 14-lead, small outline package (sop) package drawings are provided as a service to customers considering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the draw ing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild s worldwide terms and conditions, ? specifically the warranty therein, which covers fairchild products. always visit fairchild semiconductors online pack aging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ . land pattern recommendation notes: unless otherwise specified a) this package conforms to jedec ms-012, variation ab, issue c, b) all dimensions are in millimeters. c) dimensions do not include mold flash or burrs. d) landpattern standard: soic127p600x145-14m e) drawing conforms to asme y14.5m-1994 f) drawing file name: m14arev13 pin one indicator 8 0 seating plane detail a scale: 20:1 gage plane 0.25 x 45 1 0.10 c c b ca 7 m 14 b a 8 see detail a 5.60 0.65 1.70 1.27 8.75 8.50 7.62 6.00 4.00 3.80 (0.33) 1.27 0.51 0.35 1.75 max 1.50 1.25 0.25 0.10 0.25 0.19 (1.04) 0.90 0.50 0.36 r0.10 r0.10 0.50 0.25
FAN7390A ? high-current, hi gh & low side, gate-drive ic ? 2012 fairchild semiconductor corporation www.fairchildsemi.com FAN7390A rev. 1.0.0 12

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